ZIH-Kolloquium: "The Modular Supercomputing Architecture: hardware composability for application diversity"

The Modular Supercomputing Architecture: hardware composability for application diversity
The way supercomputers have been built across history has evolved driven by the constant need to increase performance at an affordable cost. Recently the trend goes towards heterogeneous configurations combining general purpose processing units (CPUs) with acceleration devices (e.g. graphic cards (GPUs) or many-core processors). The Modular Supercomputing Architecture developed at the Jülich Supercomputing Centre implements heterogeneity at system-level by segregating CPU and acceleration resources, and strives to provide cost-effective computing at extreme scale fitting the needs of a wide range of Computational Sciences. In a modular supercomputer each application can dynamically decide which kinds and how many nodes to use, mapping its intrinsic requirements and concurrency patterns onto the hardware. Codes that perform multi-physics or multi-scale simulations can run across compute modules thanks to a global system-software and programming environment. Application workflows that execute different actions after (or in parallel) to each other can also be distributed in order to run each workflow-component on the best suited hardware, and exchange data either directly (via message-passing communication) or via the file-system.
This talk will explain the concept of Modular Supercomputing including its background and evolution, how it is built and programmed, and show-case results from scientific applications that are profiting from it.
Dr. Estela Suarez is Senior Scientist and deputy-lead of the Technology Department at the Jülich Supercomputing Centre, which she joined in 2010. Her research focuses on HPC system architectures and codesign. As leader of the DEEP series of EU-funded projects she has driven the development of the Cluster-Booster and the Modular Supercomputing Architectures, including hardware, software and application implementation and validation. Additionally, since 2018 she leads the codesign efforts within the European Processor Initiative. Since 2018 she gives lectures on HPC architectures at the University of Bonn. She holds a Phd in Physics from the University of Geneva and a Master degree in Astrophysics from the University Complutense of Madrid.