publications

2020

• Method for the computer-aided design and simulation of hydrogel-based microfluidic chipsVoigt, A., Schreiter, J., Mayr, C. G. & Richter, A., 2020, Proceedings ASIM SST 2020, 25. Symposium Simulationstechnik. p. 221-226Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic SystemsVoigt, A., Schreiter, J., Frank, P., Pini, C., Mayr, C. & Richter, A., 2020, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39, 8, p. 1635-1648Electronic (full-text) versionResearch output: Contribution to journal > Research article
• OPC UA von der Cloud bis ins Feld: Durchgehende vertikale semantische Integration durch OPC UA in Hardware Urbas, L., Bauer, P., Mendoza, F., Deckert, H., Merlin, T., Bachmann, R., Luschtinetz, M. & 8 others, 2020, In: atp magazin. 62, 3, p. 90-101, 12 p.Electronic (full-text) versionResearch output: Contribution to journal > Research article
• Plasticity and Adaptation in Neuromorphic Biohybrid SystemsGeorge, R., Chiappalone, M., Giugliano, M., Levi, T., Vassanelli, S., Partzsch, J. & Mayr, C., 2020, In: iScience. 23, 10, 101589Electronic (full-text) versionResearch output: Contribution to journal > Review article
• Real-time Hardware Implementation of ARM CoreSight Trace DecoderZeinolabedin, S. M. A., Partzsch, J. & Mayr, C., 2020, In: IEEE design & test : D & T. 38, 1, p. 69-77, 9 p.Electronic (full-text) versionResearch output: Contribution to journal > Research article

2019

• Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOSProtze, F., Kreisig, M., Ellinger, F., Hoppner, S., Hartmann, S., Huanzsche, S., Scholze, S. & 2 others, Oct 2019, VLSI-SoC 2019 - 27th IFIP/IEEE International Conference on Very Large Scale Integration, Proceedings. Metzler, C., De Micheli, G., Gaillardon, P., Silva-Cardenas, C. & Reis, R. (eds.). IEEE Computer Society, p. 155-158, 4 p., 8920295Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Hard Real-Time Capable OPC UA Server as Hardware Peripheral for Single Chip IoT SystemsIatrou, C. P., Bauer, H., Graube, M., Höppner, S., Rahm, J. & Urbas, L., Sep 2019, Proceedings - 2019 24th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2019. Institute of Electrical and Electronics Engineers (IEEE), p. 1631-1634, 4 p., 8868968Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Dynamic Power Management for Neuromorphic Many-Core SystemsHoppner, S., Vogginger, B., Yan, Y., Dixius, A., Scholze, S., Partzsch, J., Neumarker, F. & 8 others, Aug 2019, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 8, p. 2973-2986, 14 p., 8701528Electronic (full-text) versionResearch output: Contribution to journal > Research article
• A Biohybrid Setup for Coupling Biological and Neuromorphic Neural NetworksKeren, H., Partzsch, J., Marom, S. & Mayr, C., 1 May 2019, In:  Frontiers in neuroscience. 13, MAY, 432Electronic (full-text) versionResearch output: Contribution to journal > Research article
• A fast lock-in ultra low-voltage ADPLL clock generator with adaptive body biasing in 22nm FDSOI technologySchraut, F., Eisenreich, H., Hoppner, S. & Mayr, C., 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers (IEEE), 8702109Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution