publications

2017

• Exploiting transistor-level reconfiguration to optimize combinational circuitsRaitza, M., Kumar, A., Völp, M., Walter, D., Trommer, J., Mikolajick, T. & Weber, W., 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technologyBauer, H., Höppner, S., Partzsch, J., Walter, D., Mayr, C., Schraut, F. & Eisenreich, H., 2017, 6 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
• Neuromorphic hardware in the loop: Training a deep spiking network on the brainscales wafer-scale systemSchmitt, S., Klaehn, J., Bellec, G., Grübl, A., Guettler, M., Hartel, A., Hartmann, S. & 3 others, 2017, Neural Networks (IJCNN), 2017 International Joint Conference on. p. 2227-2234, 8 p.Research output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Novel ferroelectric FET based synapse for neuromorphic systemsMulaosmanovic, H., Ocker, J., Muller, S., Noack, M., Muller, J., Polakowski, P., Mikolajick, T. & 1 others, 2017, Digest of Technical Papers - Symposium on VLSI TechnologyElectronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution

2016

• A database accelerator for energy-efficient query processing and optimizationHaas, S., Arnold, O., Scholze, S., Hoppner, S., Ellguth, G., Dixius, A., Ungethum, A. & 10 others, 21 Dec 2016, 2016 IEEE Nordic Circuits and Systems Conference (NORCAS). Sparso, J., Jorgensen, I., Nielsen, I. R. & Nurmi, J. (eds.). Institute of Electrical and Electronics Engineers (IEEE), 7792904Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• An MPSoC for Energy-Efficient Database Query ProcessingHaas, S., Arnold, O., Chen, Y., Dixius, A., Eisenreich, H., Ellguth, G., Fettweis, G. & 18 others, 1 Jun 2016, Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Austin, Texas, a112Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor CircuitsMayr, C., Partzsch, J., Noack, M., Hänzsche, S., Scholze, S., Höppner, S., Ellguth, G. & 1 others, 2016, In: IEEE transactions on biomedical circuits and systemsElectronic (full-text) versionResearch output: Contribution to journal > Research article
• A Calibration Technique for Bang-Bang ADPLLs Using Jitter Distribution MonitoringHöppner, S., Partzsch, J., Neumann, J., Schüffny, R. & Mayr, C., 2016, In: IEEE transactions on very large scale integration (VLSI) systems. 24, 12, p. 3548-3552, 5 p.Electronic (full-text) versionResearch output: Contribution to journal > Research article
• Beyond Spike-Timing Dependent Plasticity in Memristor Crossbar ArraysMostafa, H., Mayr, C. & Indiveri, G., 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS). Institute of Electrical and Electronics Engineers (IEEE), p. 926-929, 4 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
• Clock Generators for Heterogeneous MPSoCs Within 3D Chip StacksHöppner, S., Walter, D. & Schüffny, R., 2016, 3D Stacked Chips: From Emerging Processes to Heterogeneous Systems. Elfadel, I. M. & Fettweis, G. (eds.). Switzerland: SpringerResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution