Plenary Speakers
The following Plenary Speakers will be highlights to our program:
Inhaltsverzeichnis
Sandro Carrara
Professor and Head of the Bio/CMOS interfaces laboratory at the EPFL in Lausanne (CH)
Plenary talk: "In-Memory Sensing by Switching Devices"
During the past two decades, a number of switching devices have been demonstrated in literature. They typically exhibit hysteric behavior in the current-to-voltage characteristics when driven by the source-drain potential in two-terminal configurations, or when driven by a proper potential to the program gate. Literature called them memristors in the first case, or reconfigurable transistors in the second. The switching capability of these devices made them particularly well-suited for applications to in-memory computing or in-memory sensing. The aim of this perspective keynote is then twofold. On one hand, it seeks to provide a comprehensive examination of the existing switching devices. On the other hand, it proposes CMOS architectures based on switching devices with aim to develop new non-Von-Neumann computing machines that can seamlessly integrate sensing and computing within memory units. Therefore, this keynote aims to demonstrate practical applications of such an innovative approach to the realm of cancer diagnostics, by exploiting the modern concept of simultaneously employing multiple cancer biomarkers to enhance the efficiency of diagnostic processes in cancer medicine.
Short Bio: Sandro Carrara is an IEEE Fellow (F’15) and the recipient of the IEEE Sensors Council Technical Achievement Award in 2016, and the Scientist Medal by the International Association of Advanced Materials in 2024. He is Professor at the EPFL in Lausanne (CH), and Head of the Bio/CMOS interfaces laboratory. He is also a former professor at the Universities of Genoa and Bologna (IT). He holds a PhD in Biochemistry and Biophysics from University of Padua (IT), a master degree in physics from University of Genoa (IT), and a diploma in Electronics from National Institute of Technology in Albenga (IT). Along his career, he published 7 books with prestigious publishers such as Springer/NATURE and Cambridge University Press. He has more than 400 scientific publications and is author of 19 patents/patent-requests. He is former Editor-in-Chief of the IEEE Sensors Journal, one of the largest journals among 220 IEEE publications, and Associate Editor of IEEE Transactions on Biomedical Circuits and Systems. He is also former Founding Editor-in-Chief of the Springer/NATURE journal titled NanoBioScience. He is a member of the IEEE Sensors Council and his Executive Committee. He was a member of the Board of Governors (BoG) of the IEEE Circuits And Systems Society (CASS). He has been appointed as CASS Distinguished Lecturer for the years 2013-2014, and IEEE Sensors Council Distinguished Lecturer for the years 2017-2019. His work has constantly received international recognition with several best-cited papers and best conference papers. He has been the General Chairman of the premier worldwide international conference in the area of circuits and systems for biomedical applications, IEEE BioCAS, in 2014. He also has been the General Chairman of the 16th Edition of IEEE International Symposium on Medical Measurements and Applications, IEEE MeMeA, in 2021.
Hai (Helen) Li
Professor and Department Chair of the Electrical and Computer Engineering Department, Duke University in Durham (US)
Plenary talk: "Big AI for Small Devices"
As artificial intelligence (AI) transforms industries, state-of-the-art models have exploded in size and capability. However, deploying these models on resource-constrained edge devices remains a significant challenge. Smartphones, wearables, and IoT sensors face stringent limitations on computing, memory, power, and communication, creating a big gap between demanding AI models and edge hardware capabilities that hinders the deployment of intelligence. In this talk, we will re-examine techniques to bridge this gap and embed big AI on small devices. We will begin by discussing how the properties of various hardware platforms impact the design strategies of efficient deep neural network (DNN) models, such as quantization and pruning. Next, we will discuss techniques aimed at reducing the inference and training costs of distributed collaborative edge AI systems. Finally, we will delve into the underlying design philosophies and their evolution toward efficient, scalable, robust, and secure edge computing systems.
Short Bio: Hai (Helen) Li is the Marie Foote Reel E’46 Distinguished Professor and Department Chair of the Electrical and Computer Engineering Department at Duke University. She received her B.S. and M.S. degrees from Tsinghua University, and her Ph.D. degree from Purdue University. Her research interests include neuromorphic circuits and systems for brain-inspired computing, machine learning acceleration and trustworthy AI, conventional and emerging memory design and architecture, and software and hardware co-design. Dr. Li served/serves as the Associate Editor-in-Chief and Associate Editor for multiple IEEE and ACM journals. She was the General Chair or Technical Program Chair of multiple IEEE/ACM conferences and the Technical Program Committee member of over 30 international conference series. Dr. Li has received many awards, including the IEEE Edward J. McCluskey Technical Achievement Award, Ten Year Retrospective Influential Paper Award from ICCAD, TUM-IAS Hans Fischer Fellowship from Germany, ELATE Fellowship, nine best paper awards, and another ten best paper nominations from IEEE/ACM. Dr. Li is a fellow of IEEE, ACM, and NAI.
Themis Prodromakis
Regius Chair of Engineering, Centre for Electronics Frontiers, Institute for Micro Nano Systems, University of Edinburgh in Edinburgh (UK)
Plenary talk: "Innovations across AI and Semiconductors"
The 21st century is defined by increasingly intelligent machines and a drive to use them for augmenting human capability. On one side, developments in Artificial Intelligence (AI) are more and more inspired by nature’s efficiency. On the other hand, advances in medical interventions are increasingly driven by ever more intelligent electronics. Innovation in engineering underpins both on a fundamental level.
A novel nanoelectronic technology, known as the memristor, proclaims to hold the key to all, being both smaller and simpler in form than transistors, low-energy, and with the ability to retain data by ‘remembering’ the amount of charge that has passed through them – akin to the behaviour of synaptic connections in the human brain. In this talk Professor Prodromakis will present the attributes of memristive technologies that make this emerging technology attractive for a variety of applications – ranging from bio-inspired memories to compressing sensing and even embedding “AI on chip”.
Short Bio: Professor Themis Prodromakis holds the Regius Chair of Engineering at the University of Edinburgh and is Director of the Centre for Electronics Frontiers. His work focuses on developing metal-oxide Resistive Random-Access Memory technologies and related applications and is leading an interdisciplinary team comprising 30 researchers with expertise ranging from materials process development to electron devices and circuits and systems for embedded applications. He holds a Royal Academy of Engineering Chair in Emerging Technologies and a Royal Society Industry Fellowship. He is an Adjunct Professor at UTS Australia, visiting Professor at the Department of Microelectronics and Nanoelectronics at Tsinghua University, and Honorary Fellow at Imperial College London. He is Fellow of the Royal Society of Chemistry, the British Computer Society, the IET and the Institute of Physics and is also Senior Member of the IEEE. He served as the Director of the Lloyds Register Foundation International Consortium for Nanotechnology and Co-Director of the UKRI Centre for Doctoral Training in Machine Intelligence for Nano- Electronic Devices and Systems (MINDS). In 2015, he established ArC Instruments Ltd that delivers high-performance testing infrastructure for automating characterisation of novel nanodevices in over 21 countries and in 2019 he founded SoneT.ai that is building new power-efficient AI hardware solutions. His contributions in memristive technologies and applications have brought this emerging technology one step closer to the electronics industry for which he was recognised as a 2021 Blavatnik Award UK Honoree in Physical Sciences and Engineering.
Jaan Raik
Professor at the Department of Computer Systems, Head of the Center for Dependable Computing Systems, Tallinn University of Technology (TalTech) in Tallinn (EE)
Plenary talk: "AI chips. How about safety and security? "
The recent breakthrough of Artificial Intelligence (AI) has been partly enabled by the advances in chip technology and computer architectures as well as by the emergence of dedicated hardware accelerator chips. However, the probabilistic nature of the AI-based systems block their application in safety-critical applications. In this talk we will review the challenges to the safety and security of the AI chips and will show how these aspects can be accurately assessed in a fast and scalable manner and also enhanced. It will be shown that many effective robustness enhancement methods turn out to have low cost in terms of additional resources. Moreover, new, safety aware pruning methods will be presented that in fact result in reduced neural network model sizes with increased levels of robustness. The talk is based on recent advances in the research of safe and secure AI chips by the Taltech team and researchers world-wide.
Short Bio: Jaan Raik is a Full Professor and Head of the Center for Dependable Computing Systems at the Tallinn University of Technology (Taltech), Estonia, where he received his M.Sc. and Ph.D. degrees in 1997 and in 2001, respectively. His research interests cover a wide area in electrical engineering and computer science domains including reliability of deep learning, hardware test, functional verification,
fault-tolerance and security as well as emerging computer architectures. He has co-authored more than 400 scientific publications. He is the National Contact for the Estonian Chip Competence Center KIIP, a member of ISO PAS 8800 standardization committee (AI functional safety for automotive), a EUROPRACTICE and ARM Academic Access representative, a member of IEEE Computer Society, HiPEAC and of Steering/Program Committees of numerous conferences within his field. He has been active
in organizing top-level international conferences at the General Chair (IEEE European Test Symposium’25,’20, IFIP/IEEE VLSI-SoC’16, DDECS’12), Vice General Chair (IEEE European Test Symposium’24, DDECS’13), Program Co-Chair (DDECS’23,’15, CDN-Live’16) and Local Organization Chair (IEEE European Test Symposium’05) levels. He was awarded the Global Digital Governance Fellowship at Stanford University (2022), HiPEAC Paper Award (2020), the Order of the White Star 4th class medal by the President of Estonia (2016) and Estonian Academy of Science’s Bernhard Schmidt Award for innovation (2007). He coordinated several European-level research and collaboration actions including the Horizon 2020 RIA IMMORTAL, the Horizon 2020 Twinning TUTORIAL and the FP7 DIAMOND.
Locate Prof. Jaan Raik at this link.
J. Joshua Yang
Freeman Chair Professor in the Department of Electrical and Computer Engineering at the University of Southern California (USC) in Los Angeles (US).
Plenary talk: "Diffusive and drift memristors for neuromorphic and analog computing"
Memristors can be broadly categorized into diffusive memristors and drift memristors, based on their reset switching mechanisms. Diffusive memristors reset via the diffusion of mobile species under zero electrical bias, exhibiting dynamics that closely mimic biological ion behavior. This unique characteristic enables efficient neuromorphic computing. In contrast, drift memristors reset through the drift of mobile ions under an electric field, offering highly stable analog resistance levels ideal for constructing neural networks for analog computing. This presentation will highlight recent advancements in memristor devices, arrays, and their application demonstrations, showcasing their potential in emerging computing paradigms.
Short Bio: J. Joshua Yang is the Arthur B. Freeman Chair Professor in the Department of Electrical and Computer Engineering at the University of Southern California (USC). His research focuses on post-CMOS hardware for neuromorphic computing, machine learning, and artificial intelligence, in which he has published several pioneering papers and holds over 120 granted U.S. patents. Dr. Yang is the Founding Chair of the IEEE Neuromorphic Computing Technical Committee, Director of the USC–Air Force Center of Excellence on Neuromorphic Computing, and Co-Founder of TetraMem Inc. He has received numerous honors, including the Powell Faculty Research Award, the UMass Distinguished Faculty Lecturer Award, and the UMass Chancellor’s Medal—the highest honor bestowed by the University of Massachusetts. He serves as an Associate Editor for associate editor of Science Advances (AAAS), ED-M (IEEE), PNAS (NAS). Dr. Yang is a Clarivate™ Highly Cited Researcher and ranked among the Top Scientists by Research.com. He is a Fellow of IEEE and the National Academy of Inventors (NAI), recognized for his seminal contributions to resistive switching materials and devices for non-volatile memory and neuromorphic computing.
Locate Prof. J. Joshua Yang at this link
Christian Koitzsch
President and managing director of the European Semiconductor Manufacturing Company (ESMC), Dresden
Plenary talk: " ESMC – a light house project of the European chips act in Silicon Saxony "
ESMC, a joint venture between Bosch, Infineon, NXP and TSMC, is establishing an advanced logic foundry operation in Dresden, Germany. The facility will be a first-of-its-kind 12 nm FINFET open EU foundry. The talk will present the current status and future plans of the project. Special emphasis is given to sustainability and talent development.
Short Bio: Dr. Christian Koitzsch has been the president and managing director of the European Semiconductor Manufacturing Company (ESMC) since beginning of 2024. He was raised in Thueringia, is married and is father of two children. He studied Electrical Engineering at Technische Universität Ilmenau and North Carolina State University in Raleigh (US) and received a PhD in solid state physics from the University of Neuchâtel, Switzerland.