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May 07, 2021
Pascal Scholz: Porting L4Re Microkernel / Hypervisor to RISC-V (Intermediate presentation research project)
Apr 08, 2021
Florian Schuster: Development of a 64-bit RISC-V based multi-core shared memory system (Studienarbeit)
Apr 07, 2021
Christoph Tietz: Realization of a 2D-Bitstream Relocation on Xilinx UltraScale+ (Presentation Belegarbeit)
Mar 22, 2021
Mohamed Naeim: Investigating Chisel programming language for hardware development (Project work)
Mar 22, 2021
Yifan Yang: RISC-V Processor Development: Cache Memory and Branch Prediction Unit (Project work)
Mar 09, 2021
Osama Ibrahim: HW/SW Co-Design of a Feature Matching Algorithm for an ARM-FPGA System (Intermediate presentation project work)
Mar 08, 2021
Mohamed Naeim: : Investigating Chisel programming language for hardware development (Intermediate presentation project work)

Mar 08, 2021
Yifan Yang: RISC-V Processor Development: Cache Memory and Branch Prediction Unit (Intermediate presentation project work)
Mar 08, 2021
Kun Qin: Extending execution stage of a RISC-V based processor (Intermediate presentation project work)