Publications
172 Entries
2020
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SysIDLib: A High-Level Synthesis FPGA Library for Online System Identification , 2020, p. 97-107, 11 p.Research output: Contribution to conferences > Paper
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Towards a Modular RISC-V based Many-Core Architecture for FPGA Accelerators , 2020, In: IEEE Access. p. 1-15, 15 p.Research output: Contribution to journal > Research article
2019
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Whisper: Fast flooding for low-powerwireless networks , Oct 2019, In: ACM transactions on sensor networks. 15, 4, 26 p., 47Electronic (full-text) versionResearch output: Contribution to journal > Research article
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Accelerating AAL Home Services Using Embedded Hardware Components , 2019, RADIO--Robots in Assisted Living: Unobtrusive, Efficient, Reliable and Modular Solutions for Independent Ageing. Karkaletsis, V., Konstantopoulos, S., Voros, N. S., Annicchiarico, R., Dagioglou, M. & Antonopoulos, C. P. (eds.). Springer International Publishing AG, p. 91-112, 22 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Chapter in book/Anthology/Report
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Cycle-accurate Debugging of Multi-clock Reconfigurable Systems , 2019, p. 1-5Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Dark-Silicon Inspired Energy Efficient Hierarchical TDM NoC , 2019, p. 116-121, 6 p.Research output: Contribution to conferences > Paper
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Developing Low-Power Image Processing Applications with the TULIPP Reference Platform Instance , 2019, Hardware Accelerators in Data Centers. Kachris, C., Falsafi, B. & Soudris, D. (eds.). Springer International Publishing AG, p. 181-197, 17 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Chapter in book/Anthology/Report
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Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint FPGA Implementation , 2019, International Conference on Field Programmable Logic and Applications (FPL). IEEE Xplore, p. 121-128, 8 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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FPGA-ROS: Methodology to Augment the Robot Operating System with FPGA Designs , 2019, p. 1-5Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Hardware/Software-Codesign for Hand Gestures Recognition using a Convolutional Neural Network , 2019, p. 23-28, 6 p.Research output: Contribution to conferences > Paper