Publications
186 Entries
2017
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Application-specific processing using high-level synthesis for networks-on-chip, 2017, p. 1-7, 7 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Exploration of OpenCL for FPGAs using SDAccel and comparison to GPUs and multicore CPUs, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL). Institute of Electrical and Electronics Engineers (IEEE), 4 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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HW/SW Co-design of an IEEE 802.11a/G Receiver on Xilinx Zynq SoC Using High-Level Synthesis, 2017, Proceedings of the 8th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, HEART 2017. 6 p., 15Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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Robust lane recognition for autonomous driving, 2017, p. 1-6, 6 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Secure and energy-efficient interconnects for board-to-board communication, 2017, 2017 IEEE 17th International Conference on Ubiquitous Wireless Broadband (ICUWB). p. 1-7, 7 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
2015
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ViPES 2015 - Preface, 22 Dec 2015, In: International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS). p. 347, 1 p., 7363696Electronic (full-text) versionResearch output: Contribution to journal > Editorial (Lead article)