Together with the University of Copenhagen, the Politecnico di Milano, the Technical University of Darmstadt and the companies Menta SAS and Codasip GmbH, the Chair of Databases at TU Dresden is launching the research project "CHORYS: Open and Programmable Accelerators for Data-intensive Applications in the Cloud".

The aim of the research cooperation is to develop a capabilities hardware and software architecture to optimize data-intensive applications in the cloud. The focus is on the integration of near-data processing and asynchronous data services in order to make data processing more efficient and resource-saving.

A central innovation aspect of CHORYS is the close integration of RISC-V-based processor extensions with specialized accelerators such as OpenSSD-V and OpenNIC-V. These enable the processing of database and analysis workloads directly at the point of data creation, thus reducing costly data movements via conventional storage and network structures.

Particularly noteworthy is the combination of programmable SSDs, SmartNICs and data-parallel processing technologies within an open architecture. In addition, a library for data-intensive patterns is being developed, which is implemented in C++ and can be executed on both host and accelerator hardware.

The project results are used in cloud computing, in data-intensive business applications, in scientific data processing and in open source projects.

As part of CHORYS, the Chair of Databases is leading the "Data-Intensive Patterns Library and APIs" work package, which aims to develop a uniform programming interface that enables the efficient distribution of data-intensive algorithms to different processing units through the flexible allocation of computing operations - with a particular focus on the vertical segmentation of data to optimize the use of available hardware resources.

A central component of this research work is the further development of the SIMD hardware abstraction library TSL developed at the Chair of Databases. This library already enables the hardware-agnostic execution of data-parallel code on various architectures such as x86, AArch64 and oneAPI-FPGAs. The consistent expansion of the TSL library is intended to further improve the efficiency and portability of data-intensive applications.

The research project is being funded by the EU with over 4 million euros over a period of four years.