VLSI Processor Design

Prof. Dr.-Ing. habil. Christian Mayr

"VLSI Processor Design"
EuI-ET-E-VLSI, EuI-IST-E-VLSI, EuI-NES-E-VLSI

module description

2 semester hours per week (SWS) lecture,

2 SWS exercise, 2 SWS practical course

Summer semester 2024
(to the timetable)

• annually in the summer semester

Compulsory elective module for

• the Master's degree program "Nanoelectronic Systems",Field of study Nanoelectronic

• Lecture VLSI Processor Design
• Practical course VLSI Processor Design

The content of the module includes
- Fundamentals, concepts and methods for the development of complex digital VLSI systems
- Architectural concepts for highly integrated digital processing systems, particularly in the areas of processor systems and application-specific signal processing systems
- Methods for the efficient transfer of architectural concepts into the highly integrated implementation of a digital system
- Specification and abstract modeling of the system, conversion into a register transfer description (RTL), automated circuit synthesis and physical implementation (place & route, layout synthesis),
- Verification of the design at all levels of abstraction (behavior, implementation) through simulation (functional verification)
- Proof of equivalence of transformation steps through formal verification, checking compliance with design rules (signoff verification)
design rules (signoff verification)
- Testing in the design team (division of tasks, definition of interfaces, process and time planning)

After completing the module, students will be able to carry out a complete implementation and verification of a VLSI system using industrial design software (Synopsys, Cadence).