Publication in IEEE Transactions on Very Large Scale Integration (VLSI) Systems

We are pleased to share that our work, Trust-Based Adaptive Routing in Network-on-Chip: A Comprehensive Overview and Evaluation, has been accepted for publication in an upcoming issue of IEEE Transactions on Very Large Scale Integration (VLSI) Systems TVLSI.

Abstract: In recent years, Network-on-Chip (NoC) has become the standard for efficient communication in Multiprocessor System-on-Chip (MPSoC) systems. As a result, security and reliability concerns are becoming an increasingly important factor when designing such systems. One major concern is threats imposed by hardware trojans (HTs) that may be injected during the manufacturing process. We consider HTs that modify data transmitted to perform integrity or Denial-of-Service (DoS) attacks. To limit the possibilities of such attacks, we use trust-based adaptive routing, which aims at bypassing the HT and, thus, increasing the reliability of the system. We analyze different trust assessment (TA) metrics and combine them with the minimal adaptive routing algorithm, Dynamic XY (DyXY). Each TA approach was evaluated in terms of its reliability, quality of TA, and storage overhead. In addition, to find an effective tradeoff between overhead and reliability, the influence of different system parameters on the evaluation measures was analyzed. The evaluation was performed using the PANACA simulation platform based on SystemC Transaction-level modeling (TLM). Our results show that using TA increases the reliability of the communication by 12% and between 40% and 50% fewer flits are routed through nodes infected with an HT while requiring two to 20-kByte additional storage depending on the TA metric.