Zuwen Ou, M.Sc.
© Zuwen Ou
Research Assistant
NameMr M.Sc. Zuwen Ou
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Short CV:
Zuwen Ou is a Ph.D student and research associate in the Adaptive Dynamic Systems (ADS) chair at Technische Universität Dresden since August 2024. Before joining the ADS research group, he received his M.Sc. degree in Electrical Engineering and Information Technology from Karlsruhe Institut für Technology in 2024 and his B.Eng. in Electrical Engineering and Automation from China University of Mining & Technology, Peking, in 2018.
Research Interests:
His research interests include High-Level Synthesis (HLS), HW/SW co-design for embedded systems (FPGAs).
2026
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MoSim: A Modular Simulation Framework for FPGA-based Systolic CNN Accelerators, 18 Jun 2026, ISCAS 2026 - 2026 IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers (IEEE), p. 773-777, 5 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
2025
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An Adaptive and Secure Resource Management Architecture for Virtualized FPGAs, 29 Oct 2025, 2025 IEEE Nordic Circuits and Systems Conference (NorCAS). Nurmi, J., Pikulins, D., Ellervee, P. & Liobe, J. (eds.). IEEE Canada, p. 1-7, 7 p., 11231310Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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Hardware-Level Adaptive Scheduling for Reconfigurable Accelerators on Virtualized FPGAs, 12 Sep 2025, 2025 28th Euromicro Conference on Digital System Design (DSD). Casini, D. & Cazorla, F. J. (eds.). IEEE Canada, p. 566-573, 8 p., 11272671Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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