Habib ul Hasan Khan: Automated Debugging Methodology for FPGA-based Systems

30.04.2019, 11.30 Uhr, APB 1096

Einladung zum Statusvortrag im Promotionsverfahren von Herrn Habib ul Hasan Khan

Thema: “Automated Debugging Methodology for FPGA-based Systems”

Betreuer: Prof. Dr.-Ing. Diana Göhringer
Fachreferent: Seniorprofessor Dr.-Ing. habil. Rainer Spallek

This research presents a comprehensive debugging solution to debug functional and intermittent errors for embedded systems having single or multiple clock domains using artificial intelligence techniques such as inference and machine learning. The methodology supports cycle as well as event-based debugging. The proposed methodology, through clock management, allows cycle-based lossless debugging with effectively unlimited trace window using limited Block RAMs on the Field Programmable Gate Array (FPGA). Because of the lossless nature of the debug data, the cycle-accurate replay of the debugging data is possible hence allowing functional as well as intermittent error capture. Observability can be enhanced using concentration networks, data compression and priority-based signal selection. An automated error detection technique has also been proposed which can help in capturing the errors with or without golden reference by using a rule-based inference system. Machine learning techniques such as Recurrent Neural Network can also be applied for debugging.