Lingyi Meng: Automated Framework for Verification of Hardware Accelerators on FPGAs with Hardware-in-the-Loop (Intermediate presentation master thesis)

09.05.2025, 14:00 pm

Invitation to the intermediate presentation of Ms. Lingyi Meng

Topic: Automated Framework for Verification of Hardware Accelerators on FPGAs with Hardware-in-the-Loop

Project: Master thesis

Supervisors: Yanjun Lu, Matthias Nickel