Najdet Charaf: Design of Runtime Scalable and Reliable Reconfigurable Computing Systems (Status talk)

09.01.2024, 10:30 am, Room APB 1004

Invitation to the Status taslk of Mr. Dipl.-Ing. Najdet Charaf

Topic: Design of Runtime Scalable and Reliable Reconfigurable Computing Systems

Supervisor: Prof. Dr. Diana Göhringer

Fachreferent: Prof. Akash Kumar

Abstract: Reconfigurable computing systems aim to bridge the gap between hardwired technology, such as application-specific integrated circuits (ASICs), and software-programmed microprocessors. They have the potential to achieve higher performance than software while retaining a greater degree of flexibility than hardware-based application execution. Reconfigurable devices, such as field-programmable gate arrays (FPGAs), are used to close this gap and provide an underlying context of adaptability. The increasing interest in the use of FPGA's in datacenters, and the move to adaptive systems in areas like image processing, automotive, and biomedicine, highlights the growing use of runtime reconfiguration in deployed systems. However, making the design of adaptive systems accessible to a wider audience, including those without expertise in hardware design, and alleviating the difficulties that users face when using current tools and workflows, requires addressing the following research challenges: (1) at the architecture level: how to transform a non-adaptive design to be runtime-adaptive, (2) at the methods level: how to overcome the limitations of existing workflows (including abstracting away numerous of rules required for designing such an adaptive system), (3) at the management and runtime realization level: how to abstract the control overhead that comes along with runtime reconfiguration and how to autonomously manipulate the bitstream in order to achieve reconfiguration. This talk will present approaches and solutions to address the above mentioned challenges. Solutions include presenting a runtime scalable architecture (providing approaches for partitioning, floorplanning), automated workflows to simplify the difficulties of runtime reconfiguration and relocation, and providing middleware in addition to APIs to enable loading and unloading of new accelerators as well as manipulating the content of dedicated bitstreams.