Qiurong Yin: Leveraging LLMs for RTL Code Optimization in FPGA Design Flows (Intermediate presentation project work)

03.08.2026, 15:30 pm

Invitation to the intermediate presentation of Ms. Qiurong Yin

Topic: Leveraging LLMs for RTL Code Optimization in FPGA Design Flows

Project: Project work

Supervisors: Jin Yuan, Gloria Sepenta