Xinyue Shi: DMA Controller and Library Implementation and Integration for NoC-based RISC-V Systems (Project work)

04.06.2021, 10:00 am

Invitation to the final presentation of  Xinyue Shi (Project Work)

Topic:  DMA Controller and Library Implementation and Integration for NoC-based RISC-V Systems

Project: Project work

Supervisors: Lester Kalms, Muhammad Ali,  Ahmed Kamaledin Atef

Abstract: RISC-V is an instruction set architecture that obeys the RISC principles. The Parallel Ultra Low Power (PULP) platform provides a RISC-V processor core, RI5CY,that supports several RISC-V instruction sets and PULP specific extensions. In this project, this RISC-V processor core is given as a RISC-V system. The motivation is to realize the data transfer between this RISC-V system and the system memory, with at least medium performance. Advanced eXtensible Interface (AXI) DMA, an Intellectual Property (IP) core of Zynq-7000 SoC, is used to access the system memory directly. A controller is created to control AXI DMA. The RISC-V system is connected to AXI DMA by Network Interface. A library is created for the RISC-V system to use the DMA controller and AXI DMA. This library realizes data transfer inside the final system, the Network-on-Chip(NoC)-based RISC-V system, which accesses system memory by AXI DMA.