Yike Jing: FPGA-based Real-Time Learning Architecture with Partial Reconfiguration for Spiking Neural Networks (Intermediate presentation master thesis)

27.07.2026, 10:00 am

Invitation to the intermediate presentation of Mr. Yike Jing

Topic: FPGA-based Real-Time Learning Architecture with Partial Reconfiguration for Spiking Neural Networks

Project: Master thesis

Supervisors: Gloria Sepenta, Dr.Ing. Lester Kalms