Yike Jing: FPGA-based Real-Time Learning Architecture with Partial Reconfiguration for Spiking Neural Networks (Master thesis)

07.10.2026, 13:00 pm

Invitation to the presentation of Mr. Yike Jing

Topic: FPGA-based Real-Time Learning Architecture with Partial Reconfiguration for Spiking Neural Networks

Project: Master thesis

Supervisors: Gloria Sepenta, Dr.Ing. Lester Kalms