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Jun 16, 2025
Hüseyin Ege Pamuk: Design and Implementation of a Power-Efficient Dynamic Dual-Issue RISC-V Processor (Master thesis)

20.06.2025, 11:00 am

Jun 02, 2025
Rehan Karthik Chandralal: Development of a Configurable Network Interface with Embedded Compute Units for NoC-based SoC (Intermediate presentation master thesis)

05.06.2025, 13:00 pm

May 14, 2025
Okoh Martins Osemudiamen: Graph Optimization Methods for FPGA-based NN Applications (Master thesis)

28.05.2025, 15:00 pm

Apr 30, 2025
Yong-Nian Tsai: Design of A Systolic Array-Based Variable Precision NPU (Project work)

19.05.2025, 13:30 pm

Apr 30, 2025
Bhavana Gentela: An HLS implementation of a Local Response Normalization Layer (Intermediate presentation project work)

09.05.2025, 14:30 pm

Apr 30, 2025
Zhilu Wen: Flexible High-Level Synthesis Network-on-Chip Design (Intermediate presentation project work)

09.05.2025, 09:30 am

Apr 30, 2025
Youssif Mostafa: Development of a RISC-V-based Overlay for Neural Processing Units (Project work)

08.05.2025, 14:30 pm

Apr 23, 2025
Lingyi Meng: Automated Framework for Verification of Hardware Accelerators on FPGAs with Hardware-in-the-Loop (Intermediate presentation master thesis)

09.05.2025, 14:00 pm

Apr 23, 2025
Chongyang Zheng: Optimizing Data-Flow Management for Heterogeneous Accelerator SoCs (Intermediate presentation project work)

09.05.2025, 10:00 am