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Jun 01, 2026
Vijaya Shangamesh Manoharan Amutha: Design Space Exploration (DSE) of Coarse-Grained Reconfigurable Architectures (CGRAs) (Project work)

01.06.2026, 10:30 am

May 20, 2026
Hala Said: Benchmarking and Mapping Optimization of a Mixed-Precision GEMM-Enhanced Veer EH1 Core (Intermediate presentation project work)

22.05.2026, 15:00 pm

May 11, 2026
Jaswanth Cherukuri: Exploration of alternative FPGA-suited solvers for ORB-SLAM3 (Project work)

11.05.2026, 13:30 pm

May 11, 2026
Greeshmanth Rajanala: Exploration of AI-Robotics Integration for an FPGA SoC (Project work)

11.05.2026, 12:30 pm

May 11, 2026
Eric Kreyer: HW/SW Codesign of a CGAL-based AprilTag Algorithm (Project work)

11.05.2026, 10:00 pm

Apr 29, 2026
Narasingh Prasad Joshi: Building a Benchmark Dataset for Digital Circuit Verification (Project work)

30.04.2026, 13:00 pm

Apr 20, 2026
Steven Welsch: Realisation of a realtime critical ROS 2 controller on Ultrascale+ (Project work)

24.04.2026, 09:30 am

Apr 20, 2026
Mohamed Elmekawy: Investigation of Adaptive Power Reduction Techniques in the Veer EH1 Processor Core (Intermediate presentation project work)

21.04.2026, 10:30 am

Apr 20, 2026
Rohit Ramchandra Kumbhar: Design and Implementation of Cache Hierarchy for the Veer EH1 Processor Core (Intermediate presentation project work)

21.04.2026, 10:00 am