ZIH-Kolloquium: "Malleability for HPC"

Parallel code is malleable if it can adjust to dynamic resource changes during runtime, resulting in elasticity (shrinking/expanding), typically triggered by requests from the outside. In this talk, Josef Weidendorfer will discuss benefits of malleability for HPC code, especially for data centers. He will present a library that was developed in a recent project and will explain, how it enables malleability for parallel code, including some example and results. The talk concludes with a discussion about ongoing efforts in the HPC community to better support malleability in HPC.

Josef Weidendorfer works at Leibniz Computing Centre (LRZ) as lead of the Future Computing Group which is developing smooth migration strategies for future HPC systems and evaluating novel technologies. This includes improvement of system level and workload analysis tools as well as parallel programming models towards new usage models for LRZ hardware. Moreover he is a lecturer at Technische Universität München (TUM) with tight contact to the chair of computer architecture and parallel systems. Research interests involve best use of accelerators, heterogeneous computing, and tuning strategies for parallel code. Josef did his habilitation at TUM in 2016 on simulation-driven performance analysis for parallel code. He received his Ph.D. from TUM in 2003 for studying load balancing issues in car crash simulation on industrial code at BMW AG.

The colloquium is free of charge. Language: English

The event will be offered HYBRID. You can join the ZIH-Colloquium as following:

• LIVE: Room A317 Willersbau, Zellescher Weg 12, Dresden
• ONLINE:
  Link for participants with ZIH-Login or
  Link for participants without ZIH-Login