Dr.-Ing. Ahmed Kamaledin Atef

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Herr Dr.-Ing. Ahmed Kamaledin Atef

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Besuchsadresse:

Andreas-Pfitzmann-Bau (APB), 1099 Nöthnitzer Str. 46

01187 Dresden

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Short CV:
Ahmed Kamaledin Atef is a postdoc in the Chair of Adaptive Dynamic Systems (ADS) at Fakultät Informatik TU-Dresden, Deutschland, since July 2023. He was a PhD candidate and a research fellow since September 2017. Before joining the ADS research group, he received his M.Sc degree in Electronics and Electrical communications from Cairo University, Egypt in 2017 and his B.Sc in Electronics and Electrical communications from Cairo University, Egypt in 2012 (with honor degree).Google Scholar Linkedin

Research Interests:
His current research interests are in the hardware implementation of real-time heterogeneous reconfigurable systems for edge applications.

Publications:

16 Einträge

2025

Towards Computing a Real-Time THz Material MapAliagha, E., Batra, A., Kamaleldin, A., Kaiser, T. & Göhringer, D., 24 Feb. 2025, 2025 International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS). S. 229-231, 3 S.Elektronische (Volltext-)VersionPublikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten > Beitrag in Konferenzband

2024

Seamless Cache Extension for FPGA-based Multi-Core RISC-V SoCKamaleldin, A., Nickel, M., Wu, S. & Göhringer, D., 5 Nov. 2024, S. 1-6, 6 S.Elektronische (Volltext-)VersionPublikation: Beitrag zu Konferenzen > Paper
AMPER-X: Adaptive Mixed-Precision RISC-V Core for Embedded ApplicationsOthman, A. I. M., Kamaleldin, A. & Göhringer, D., 30 Okt. 2024, 2024 IEEE Nordic Circuits and Systems Conference (NorCAS). Nurmi, J., Rodrigues, J., Pezzarossa, L., Aberg, V. & Behmanesh, B. (Hrsg.).7 S.Elektronische (Volltext-)VersionPublikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten > Beitrag in Konferenzband

2023

Acceleration of 2D SAR Imaging on FPGA by Reducing off-chip Memory AccessesAliagha, E., Kamaleldin, A., Batra, A., Nalapat, T., Wiemeler, M., Kaiser, T. & Göhringer, D., 3 Juli 2023, 2023 6th International Workshop on Mobile Terahertz Systems, IWMTS 2023. Institute of Electrical and Electronics Engineers Inc., S. 1-5Elektronische (Volltext-)VersionPublikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten > Beitrag in Konferenzband

2022

Hardware/Software Co-design of 2D THz SAR Imaging for FPGA-based Systems-on-ChipKamaleldin, A., Aliagha, E., Batra, A., Wiemeler, M., Kaiser, T. & Göhringer, D., 21 Juli 2022, S. 1-5, 5 S.Elektronische (Volltext-)VersionPublikation: Beitrag zu Konferenzen > Paper
AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V ProcessorsKamaleldin, A. & Göhringer, D., 18 April 2022, in: IEEE Access. 10, S. 43895-43913, 19 S.Elektronische (Volltext-)VersionPublikation: Beitrag in Fachzeitschrift > Forschungsartikel
A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore SystemsKamaleldin, A. & Göhringer, D., 2022, 2022 32nd International Conference on Field-Programmable Logic and Applications (FPL). IEEE Xplore, S. 300-306, 7 S.Elektronische (Volltext-)VersionPublikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten > Beitrag in Konferenzband
An Agile Tile-based Platform for Adaptive Heterogeneous Many-Core SystemsKamaleldin, A. & Göhringer, D., 2022, S. 1-4Elektronische (Volltext-)VersionPublikation: Beitrag zu Konferenzen > Paper

2021

FPGA-Based Acceleration of THz SAR ImagingBatra, A., Kamaleldin, A., Zhen, L. Y., Wiemler, M., Göhringer, D. & Kaiser, T., 5 Juli 2021, S. 1-6, 6 S.Elektronische (Volltext-)VersionPublikation: Beitrag zu Konferenzen > Paper
RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-ChipCharaf, N., Kamaleldin, A., Thümmler, M. & Göhringer, D., Juni 2021, 2021 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2021 - In conjunction with IEEE IPDPS 2021: Portland, OR, USA. S. 172-179, 8 S., 9460688Elektronische (Volltext-)VersionPublikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten > Beitrag in Konferenzband