Dr.-Ing. Ahmed Kamaledin Atef
© Ahmed Kamal
Postdoc
NameMr Dr.-Ing. Ahmed Kamaledin Atef
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Visiting address:
Andreas-Pfitzmann-Bau (APB), 1099 Nöthnitzer Str. 46
01187 Dresden
Short CV:
Ahmed Kamaledin Atef is a postdoc in the Chair of Adaptive Dynamic Systems (ADS) at Fakultät Informatik TU-Dresden, Deutschland, since July 2023. He was a PhD candidate and a research fellow since September 2017. Before joining the ADS research group, he received his M.Sc degree in Electronics and Electrical communications from Cairo University, Egypt in 2017 and his B.Sc in Electronics and Electrical communications from Cairo University, Egypt in 2012 (with honor degree).Google Scholar Linkedin
Research Interests:
His current research interests are in the hardware implementation of real-time heterogeneous reconfigurable systems for edge applications.
Publications:
2023
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Acceleration of 2D SAR Imaging on FPGA by Reducing off-chip Memory Accesses, 3 Jul 2023, 2023 6th International Workshop on Mobile Terahertz Systems, IWMTS 2023. Institute of Electrical and Electronics Engineers Inc., p. 1-5Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
2022
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Hardware/Software Co-design of 2D THz SAR Imaging for FPGA-based Systems-on-Chip, 21 Jul 2022, p. 1-5, 5 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors, 18 Apr 2022, In: IEEE Access. 10, p. 43895-43913, 19 p.Electronic (full-text) versionResearch output: Contribution to journal > Research article
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A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore Systems, 2022, 2022 32nd International Conference on Field-Programmable Logic and Applications (FPL). IEEE Xplore, p. 300-306, 7 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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An Agile Tile-based Platform for Adaptive Heterogeneous Many-Core Systems, 2022, p. 1-4Electronic (full-text) versionResearch output: Contribution to conferences > Paper
2021
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FPGA-Based Acceleration of THz SAR Imaging, 5 Jul 2021, p. 1-6, 6 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures, 2021, Proceedings - 2021 31st International Conference on Field-Programmable Logic and Applications, FPL 2021. IEEE Xplore, p. 265-266, 2 p.Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
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RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-Chip, 2021, 2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW): Portland, OR, USA. p. 172-179, 8 p., 9460688Electronic (full-text) versionResearch output: Contribution to book/conference proceedings/anthology/report > Conference contribution
2020
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Hardware/Software Co-design for the Signal Processing of Dielectric Materials Characterization, 2020, p. 1-6, 6 p.Electronic (full-text) versionResearch output: Contribution to conferences > Paper
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Towards a Modular RISC-V based Many-Core Architecture for FPGA Accelerators, 2020, In: IEEE Access. p. 1-15, 15 p.Research output: Contribution to journal > Research article
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