IC designs from 2021
Table of contents
semantIC
Low-power SoC for industrial field devices with a hardware engine to process the OPC UA communication protocol. The system additionally contains a RISC-V CPU, a tri-mode Ethernet MAC, and serial peripherals.
Chipfoto semantIC
| Technology | 22 nm FDSOI |
| Area | 4 mm² |
| Tape-Out | 01_2021 |
| Publication | DOI: 10.1109/TVLSI.2021.3117401 |
LOTUS
Analog/Mixed-Signal Frontend for the bidirectional interfacing (Recording and Stimulation) of neuronal tissue, featuring Spike-Detection and Compression circuits. 64 channel, 9-bit DSM acquisition, 8 channel 6bit current-mode stimulation. (LOTUS stands for: Low-vOltagecircuit Technologiesfor Ultra-lowpower mixed-Signalsystems)
Screenshot Design and Foto des montierten Chips
| Technology | 22 nm FDSOI |
| Area | 10.65 mm² |
| Tape-Out | 03_2021 |
| Publication |
SpiNNaker2
The SpiNNaker2 Chip is a 152 core processing chip that will be used to construct the cloud-scale neuromorphic supercomputer SpiNNcloud. It continues the journey from the SpiNNaker1 system/chip in Manchester (https://en.wikipedia.org/wiki/SpiNNaker), with TU Dresden and University Manchester teaming up for this significantly more advanced design. It contains 152 ARM M4F cores, plus various custom accelerators for deep neural networks, spiking neural networks, stochastic computing (e.g. Monte Carlo exploration), etc. It uses advanced power saving features such as adaptive body biasing (supplied by our spinoff company Racyics), event-driven voltage and frequency scaling, energy proportional communication links, and so on. It is the ultimate development in bio-inspired computing coming out of the 10-year EU flagship Human Brain project, and will serve as a research vehicle for large-scale, real time AI, bio-inspired computing and computational neuroscience/brain simulation. It is currently the largest chip&system for real-time brain simulation. The chip has been fabricated by Global Foundries in their 22FDX technology, in a full-mask tapeout. It contains approximately 1.5 Bio transistors. The final SpiNNcloud machine will contain 10^14 transistors, which is incidentally the number of synapses in the human brain...
Again, fun fact: The mirrored rectangle visible in the package photo is actually the SpiNNaker2 chip from the back side.
SpiNNaker2
| Technology | 22 nm FDSOI |
| Area | 103 mm² |
| Tape-Out | 06_2021 |
| Publication |
powerlink-IC
100M Ethernet PHY and MAC with control circuitry for power-over-dataline. Embedded FPGA with 12x12 tile array. Ultra-low-power stand-alone sensor signal classification module for ECG and gesture classification and speech-wakeup. Energy efficient 32-bit RISC-V processor enabled by 0.55 V supply and adaptive body bias.
Chipfoto, powerlink-IC
| Technology | 22 nm FDSOI |
| Area | 4 mm² |
| Tape-Out | 11_2021 |
| Publication |
SYNCH
SYNCH is a first-of-its-kind neural recording and stimulation interface, featuring powerful hardware accelerators and a processor to fully integrate signal processing and classification capabilities. Developed in 22 nm FDSOI, this programmable system-on-chip forms a milestone in energy efficiency, towards fully implantable cortical neuroprostheses.
Chipfoto, SYNCH-IC
| Technology | 22 nm FDSOI |
| Area | 9 mm² |
| Tape-Out | 11_2022 |
| Publication |