Finished Student Theses
2026
Hari Sahasranaman, Supervisors: Jin Yuan, Rohan Krishna Vijayaraghavan (October 2026)
Hardware Architecture Design for Microscaling Data Formats in CNN Acceleration (Master thesis)
Sai Vineela Nadakuditi, Supervisor: Matthias Nickel (October 2026)
A Framework for Signal Tracing and Verification of HLS generated Ips (Maste thesis)
Yike Jing, Supervisor: Gloria Sepanta, Dr.-Ing. Lester Kalms (October 2026)
FPGA-based Real-Time Learning Architecture with Partial Reconfiguration for Spiking Neural Networks (Master thesis)
Fritz Fichter, Supervisor: Nico Röder, Ahmad Othman (September 2026)
Design and Implementation of a Variable Precision Multiply-Accumulate Unit (Bachelor thesis)
Oshi Narasingh Prasad, Supervisor: Yanjun Lu, Matthias Nickel (September 2026)
VeriLoop: A Feedback-Driven Stimulus Generation for Hardware Debugging (Master thesis)
Alexander Joerg Kurt Acker, Supervisor: Gloria Sepanta, Dr.-Ing. Lester Kalms (August 2026)
Benchmarking an FPGA-Based Spiking Neural Network Framework on New Datasets: A Case Study (Bachelor thesis)
Jonas Müller, Supervisor: Nico Röder, Ahmad Othman (July 2026)
Integration of a posit functional unit into the CVA6 RISC-V processor (Bachelor thesis)
Waqi Ur Rehman Danial, Betreuer: Arthur Nathaniel Mwang´onda (Junei 2026)
Proximity-Aware Multi-Agent Task Allocation Framework for Real-Time Autonomous Systems (Master thesis)
Otto Soyka, Supervisor: Matthias Nickel, Nico Röder (June 2026)
A Framework for Processor-NoC Co-Simulation for Heterogeneous System Modeling (Master thesis)
Hemalatha Murugesan, Supervisor: Matthias Nickel, Lu Jiang, Zuwen Ou (June 2026)
A Modular and Customizable Hardware Scheduler and Dispatcher for Heterogeneous Accelerators in a Network-on-Chip (Master thesis)
Kadir Eren Unal, Supervisor: Paul Gottschaldt, Matthias Nickel (May 2026)
Realization of a Host Code Library with Evaluation Suite (Master thesis)
Kun Qian, Supervisor: Matthias Nickel, Dr.-Ing. Lester Kalms (May 2026)
Source-to-Source Instrumentation Framework for Internal Signal Exposing of HLS generated IP cores (Master thesis)
2025
Yong Huang, Supervisor: Yanjun Lu, Jin Yuan (November 2025)
A Dynamic Multi-Level Signal Selection Framework for Efficient FPGA Debugging (Master thesis)
Sai Nikhilesh, Supervisor: Jin Yuan, Dr.Ing. Lester Kalms (October 2025)
A Framework to Realize and Integrate Quantization Methodologies for Neural Networks (Master thesis)
Muhammad Hassan Riaz Bhatti, Supervisor: Ensieh Aliagha (October 2025)
Designing a Side-Channel-Resistant Processing Element Array for Coarse-Grained Reconfigurable Architectures (CGRAS) (Master thesis)
Guangjin Li, Supervisor: Jin Yuan, Zuwen Ou (October 2025)
Implementation of an Architectural Simulator for FPGA-based NPU (Master thesis)
Wenxuan Han, Supervisor: Yanjun Lu, Matthias Nickel (October 2025)
Automated State Restoration for Cycle-Accurate FPGA Debugging (Master thesis)
Oliver Gold, Supervisor: Paul Gottschaldt, Sebastian Ebert, Ariel Podlubne (October 2025)
Realization of a Live Hardware Monitoring System for Robotics FPGA (Master thesis)
Pruthul Pradeep Andy, Supervisor: Rohan Krishna Vijayaraghavan, Dr.-Ing Ahmed Kamaleldin (September 2025)
A RISC-V Co-processor to Accelerate Sparse Matrix Operations (Master thesis)
Hiba Neffati, Supervisor: Lu Jiang (July 2025)
Vision-based Dynamic Obstacle Detection and Tracking for Mobile Robots (Master thesis)
Leah Louisa Sieder, Supervisor: Giovanni Petrucciani, Dr.-ing. Lester Kalms (June 2025)
Acceleration of Physics Algorithms on FPGA Platforms to perform Online Analysis within the CMS Phase-2 Level-1 Data Scouting System (Master thesis)
Hüseyin Ege Pamuk, Supervisor: Ahmad Othman (June 2025)
Design and Implementation of a Power-Efficient Dynamic Dual-Issue RISC-V Processor (Master thesis)
Lingyi Meng, Supervisor: Matthias Nickel, Yanjun Lu (May 2025)
Automated Framework for Verification of Hardware Accelerators on FPGAs with Hardware-in-the-Loop (Master thesis)
Martins Osemudiamen Okoh, Supervisor: Dr.-Ing. Lester Kalms, Veronia Iskandar, Dr.-Ing Ariel Podlubne (May 2025)
Graph Optimization Methods for FPGA-based NN Applications (Master thesis)
Wanqi Xing, Supervisor: Zuwen Ou, Veronia Iskandar, Dr.-ing. Lester Kalms (April 2025)
Dataflow and HBM Optimized NN Accelerator Design (Master thesis)
Shaoyong Huo, Supervisor: Dr.-Ing. Lester Kalms, Veronia Iskandar, Dr.-Ing. Ariel Podlubne (April 2025)
FPGA Resource Estimation of HLS-based Accelerators using NN (Master thesis)
Ziyuan Wang, Supervisor: Veronia Iskandar, Dr.-Ing. Ahmed Kamal (February 2025)
A Learning-based Model for Prediction of Routing Congestion on FPGA-HBM Platforms (Master thesis)
Bhavay Arora, Supervisor: Dr.-Ing. Ariel Podlubne, Dr. Sergio Pertuz, Paul Gottschaldt (February 2025)
Exploration of a HW/SW FPGA-based Co-Design of a Visual SLAM algorithm with focus on Bundle Adjustment Acceleration (Master thesis)
2024
Anastacia Grishchenko, Supervisor: Veronia Iskandar, Sergio Pertuz (November 2024)
A Meta-Heuristic-based Model for Optimization of Multi-Kernel Applications Mapping on FPGA-HBM Platforms (Diploma Thesis)
Rohan Krishna Vijayaraghavan, Supervisor: Matthias Nickel, Ahmed Kamal (November 2024)
A Framework for Configurable RISC-V-based Co-Processor Generation (Master Thesis)
Sebastian Schneider, Supervisor: Cornelia Wulf (October 2024)
Untersuchungen zu Test und Debugging eines RISC-V basierten hochparallelen Data-Flow Prozessors (Studienarbeit)
Alexander Groß, Supervisor: Julian Haase, Najder Charaf (September 2024)
Exploring Models of Reconfigurable Network-on-Chip Architectures (Diploma Thesis)
Jieyu Zhao, Supervisorr: Matthias (Semtember 2024)
Implementation of an RNN Library on FPGA using HLS (Master Thesis)
Arianna Palermo, Supervisor: Ahmed Kamaleldin Atef, Veronia Iskandar (September 2024)
A Flexible FPGA-based Neural Processing Unit Architecture (Master Thesis)
Tarek Younso, Supervisor: Veronia Iskandar, Sergio Pertuz (August 2024)
A Toolflow for Automatic Pattern Recognition of Matrix Multiplication Kernels using Input/Output Testing (Bachelor Thesis)
Habib Aouinti, Supervisor: Ahmed Kamaleldin Atef (July 2024)
Design and Implementation of a Programmable Neural Processing Unit (Diploma Thesis)
Mahmoud Elnashar, Supervisor: Muhammad Ali (May 2024)
A hardware/software co-design evaluation for RISC-V P-Extension for CNNs (Diploma Thesis)
Sisi Wu, Supervisor: Ahmed Kamaleldin, Matthias Nickel (January 2024)
Development of a Cache-Coherent System for RISC-V based MPSoC (Master thesis)
Zhichao Shi, Supervisor: Ahmed Kamal, Matthias Nickel, Cornelia Wulf (February 2024)
Exploration of Operating Systems for RISC-V based SoC (Diploma thesis)
2023
Nico Volkens, Supervisor: Julian Haase (November 2023)
Implementierung eines Netzwerk-Adapters zur sicheren Kommunikation in Networks-on-Chip (Masterar thesis)
Moritz Hädrich, Supervisor: Ensieh Aliagha, Stefan Scholze (November 2023)
Implementation of an integration concept for a high-performance chiplet (Diploma thesis)
Mahmoud Elnashar, Supervisor: Lester Kalms, Matthias Nickel (October 2023)
Arbitrary Precision Floating-Point Library for Neural Network Processing on FPGAs using HLS (Studienarbeit)
Alexander Groß, Supervisor: Julian Haase, Najder Charaf (Juni 2023)
Modelling of Dynamic Function Exchange in SystemC (Studienarbeit)
Stephan Enseleit, Supervisor: Ensieh Aliagha, Veronia Iskandar (Mai 2023)
Investigating the Impact of Emerging Non-Volatile Memories on Energy Efficiency of Coarse-Grained Reconfigurable Architectures (Masterar thesis)
Anastacia Grishchenko, Supervisor: Cornelia Wulf (April 2023)
Synchronization Strategy for Hardware Tasks to Improve Energy Efficiency (Großer Beleg)
Afif Ishamsyah Hantriono, Supervisor: Veronia Iskandar (March 2023)
Automatic Replacement of Native-Code Idioms with High-Performance Accelerator Calls (Master thesis)
2022
Akib Mohammad Azam Zaidi, Supervisor: Julian Haase (December 2022)
Development of fast area estimation for a configurable neural processing unit based on CHISEL (Master thesis)
Anna Bartuschka, Supervisor: Sergio Pertuz (October 2022)
Identification of FPGAs for their production-compatible integration in composite structures as part of intelligent systems (Bachelor thesis)
Youssef Abouelazm, Supervisor: Veronia Iskandar, Tim Häring (September, 2022)
Machine Learning Acceleration for FPGA-HBM Platforms (Bachelor thesis)
Shiqi Luo, Supervisor: Sergio Pertuz, Ahmed Kamaleldin (September, 2022)
FPGA-based Hardware-Accelerationof Iterative-Closest-Point forLocalization and SLAM (Master thesis)
YiHsuan Cheng, Supervisor: Sergio Pertuz, Ariel Podlubne, Dominik Revoir (September, 2022)
A Deep learning-based framework for the object detection, localization and grasping (Master thesis)
Bozhidar Kolarov, Supervisors: Cornelia Wulf, Gökhan Akgün, Michael Willig (July, 2022)
Multiobjective Task Mapping in a Multi-Core Architecture (Diploma thesis)
Ziyuan Zhang, Supervisor: Ariel Podlubne (June, 2022)
Hardware Implementation of Preemtable Scheduling Approaches for the Robot Operating System (ROS) via actionlib (Master thesis)
Paul Würtz, Supervisor: Diana Göhringer (April, 2022)
Real-Time Task Offloading on IIOT Gateway SoCs (Diploma thesis)
Elena Mircheva-Mendl, Supervisor: Ariel Podlubne, Johannes Mey (February, 2022)
Generic approach towards model-based robotics deployments (Master thesis)
2021
Christoph Tietz, Supervisor: Najdet Charaf (December, 2021)
Evaluation and implementation of an interface for verification of firmware and hardware (Diplomarbiet)
Yifan Yang, Supervisor: Najdet Charaf (Okt, 2021)
Design and Implementation of a Configuration Manager for a Coarse-Grained Reconfigurable Architecture for Machine Learning Applications (Master thesis)
Yi Han Poy, Supervisor: Sergio Petruz, Gökhan Akgün, Candy Lohse (Oct, 2021)
Sensor-Data Fusion of IMU and GPS Signal (Studienarbeit)
Deokgeun Kim, Supervisor: Gökhan Akgün, Cornelia Wulf (August, 2021)
Echtzeit-Task-Scheduling für Multiprocessor Systems-on-Chip (Bachelor thesis)
Tim Häring, Supervisor: Lester Kalms (June, 2021)
RA Framework to Schedule OpenVX-based Applications on x86-based Systems Containing CPUs, GPUs and FPGAs (Master Thesis)
Matthias Nickel, Supervisor: Lester Kalms (May, 2021)
Implementation and optimization of the AKAZE feature detection algorithm for the HiFlipVX library using high-level synthesis (Master Thesis)
Johannes Kath, Supervisor: Veronia Iskandar, Lester Kalms (Marc, 2021)
Automatic Compiler Annotation of Processing-in-Memory code (Diplomarbeit)
Florian Schuster, Supervisor: Ahmed Kamaleldin (March, 2021)
Development of a RV64 based multi-core shared memory system (Studienarbeit)
Christoph Tietz, Supervisor: Najdet Charaf (March, 2021)
Realization of an 2D-Bitstream Relocation on Xilinx UltraScale+ (Studienarbeit)
2020
Karl Friebel Supervisor: Lester Kalms (December, 2020)
Sycl zu C99 basierter Transpiler zur Generierung von datenflussorientierten FPGA-Beschleunigern (Diplomarbeit)
Christian Gärber, Supervisor: Gökhan Akgün (November, 2020)
Design and implementation of an FPGA-based Multi-processor Systems-on-Chip (MPSoC) (Bachelor thesis)
Matthias Von Ameln, Supervisor: Muhammad Ali (October. 2020)
A Hardware/Software Co-design for a Co-processor evaluation for RISC-V (Diploma thesis)
Bozhidar Kolarov, Supervisor: Julian Haase, Gökhan Akgün (September. 2020)
Development of various routing algorithms for extending a NoC simulator (Studienarbeit)
Paul Gottschaldt, Supervisor: Gökhan Akgün, Ariel Podlubne, Pedram Amini Rad (May. 2020)
Implementation of a graph-based SLAM algorithm (Großer Beleg)
Marcus Gottschalk, Supervisor: Ahmed Kamaleldin (May, 2020)
Application-specific FPGA design for nonlinear control of electrodynamic transducers (Diploma thesis)
2019
Anton Lorenz, Supervisor: Ariel Podlubne (December, 2019)
Embedded Hardware-Software Co-Design of the Robot Operating System (ROS) (Studienarbeit)
Philipp Horn, Supervisor: Gökhan Akgün (September. 2019)
Development and implementation of a slicing algorithm and further development of the system control of the thermoplastic 3D printing laboratory system (Diploma thesis)
Arsany Eskander, Supervisor: Pedram Amini Rad, Lester Kalms, Muhammad Ali (August. 2019)
HW/SW Co-design For Object Detection Using a Machine Learning Accelerator (Bachelor thesis)
Karim Elsebaie, Supervisor: Gökhan Akgün, Ahmed Kamal (August. 2019)
A hardware implementation of a preemptive scheduling algorithm (Bachelor thesis)
Mohamed Ellaithy, Supervisor: Ariel Podlubne, Gökhan Akgün, Habib ul Hasan Khan (August. 2019)
Design and implementation of path planning and control of a mobile robot (Bachelor thesis)
Marawan Azmy Hebaish, Supervisor: Gökhan Akgün, Habib ul Hasan Khan (August. 2019)
Design and implementation of online identification algorithms and discrete controller on reconfigurable systems (Bachelor thesis)
Sven Wendt, Supervisor: Gökhan Akgün (May. 2019)
Realization of a multi-core based real-time operating systems on a Xilinx System-on-Chip (Bachelor thesis)
Hendrik Kalberlah, Supervisor: Gökhan Akgün (April. 2019)
Realization of an RTOS-scheduler on a co-processor of a Xilinx System-on-Chip (Bachelor thesis)
Marcus Gottschalk, Supervisor: Muhammad Ali, Pedram Amini Rad, Ahmed Kamal (March. 2019)
Investigating multicore RISC-V architectures (Belegarbeit)
Matthias Brinker, Supervisor: Ahmed Kamal, Muhammad Ali, Pedram Amini Rad (March. 2019)
Machine Learning on a RISC-V processor architecture (Diploma thesis)
2018
Maximilian Hajduk, Supervisor: Lester Kalms (November. 2018)
Development of a memory controller on a Xilinx SoC for the FREAK algorithm (Großer Beleg)
Stephan Kirst, Supervisor: Gökhan Akgün (September. 2018)
Adaptive and robust control for mobile robots on Xilinx Zynq System-on-Chip architectures (Bachelor thesis)
Tom Creutz, Supervisor: Gökhan Akgün, Ariel Podlubne (August. 2018)
Design and implementation of an image processing algorithm in ROS for an FPGA-based mobile robot platform for object detection and tracking (Bachelor thesis)
Martin Wudenka, Supervisor: Gökhan Akgün, Ariel Podlubne (August. 2018)
Design and implementation of an obstacle avoidance algorithm with ROS for a mobile FPGA-based robotic platform (Bachelor thesis)
Yasmin Adel Hanafy, Betreuer: Ahmed Kamal (August. 2018)
Smart memory controller for adaptive multi-core system (Bachelor thesis)
Mahynour Foda, Betreuer: Ahmed Kamal (August. 2018)
Development of signal processing elements for low-energy adaptive hardware platforms (Bachelor thesis)
Mahmoud Elshimy, Betreuer: Gökhan Akgün, Habib ul Hasan Khan (August. 2018)
FPGA-in-the-Loop for an inverted pendulum (Bachelor thesis)