The goal of this project is to provide an energy-aware compilation flow for parallel programming that seamlessly integrates in the envisioned Hardware/Software environment of the HAEC CRC. We will focus on domain specific languages for streaming and data-base applications, a utility-aware compilation methodology with new heuristics for large, parallel applications and a tight interaction with the runtime environment to provide adaptability for energyefficient execution.

Role within the CRC 912

This project represents a bridge between high-level application specications and the underlying Hard and Software of the HAEC Box.

© CRC 912

• A04, B04: From the side of the Hardware and the lower Software layers, it uses information from project A04 and closely interacts with project B04  for a richer compiler-runtime interface.
• A13, B05, B08: From the application side, it provides code optimization for  B05, B08 and, in Phase III, for project A13.
• B01: Moreover, we will closely collaborate with project B01 for multivariant code generation.
• B02, B03: Finally, we will investigate interfaces to probabilistic model checking in B03 and situation recognition in B02.
• B04, B06: A concrete collaboration has started with B06, involving also B04, for generating different implementation variants for a single application. For this we are using the ODROID boards as in the HAEC playground.
• B05: The collaboration with B05 is yet to start, but a common understanding of the problem has been reached.

Staff

Principal Investigator

• Prof. Dr.-Ing. Jerónimo Castrillón Mazo

PhD Student

• M. Sc. Robert Khasanov